The present invention relates to the field of computer processing systems and methods. More particularly, the present invention relates to a system and method to improve power consumption in Advanced RISC Machines (ARM) based systems by turning off certain features when operating in THUMB state.
Computer systems and circuits have made a significant contribution towards the advancement of modem society and are utilized in a number of applications to achieve advantageous results. Computer systems typically include a processor that operates in accordance with a set of instructions. Numerous electronic technologies such as digital computers, calculators, audio devices, video equipment, and telephone systems include processors that have facilitated increased productivity and reduced costs in analyzing and communicating data, ideas and trends in most areas of business, science, education and entertainment. Frequently, the processors designed to provide these results are advanced RISC machines (ARM) that operate in accordance with a reduced instruction set computer architecture (RISC). However, ARM machines typically utilize coprocessors that consume significant power even when they are not engaged in supporting current ARM operations.
Typically ARM processors deliver relatively high performance and offer significant flexibility through a very powerful instruction set. The relative simplicity of a typical ARM processor facilitates a high instruction throughput and efficient time interrupt response from a compact and cost effective device. Pipelining is utilized to enable multiple components of the processing and memory systems to operate at the same time. For example, while one instruction is being executed, a subsequent instruction is being decoded, and a third instruction is fetched from memory.
Usually an ARM processor utilizes two states or instruction sets. One state or instruction set includes a 32-bit ARM set and another state or instruction set includes a 16-bit THUMB set. The THUMB set of instructions operates on the same 32-bit registers as the ARM set of instructions and achieves approximately twice the density of the ARM set while maintaining most of the ARM set performance advantages. However, there are some instances in which more functionality and higher performance are required. In these situations a coprocessor is usually included in a system.
An ARM coprocessor provides additional processing power in the ARM state. Often it is advantageous to have the coprocessor executing particular instructions while a main ARM processor is performing other functions. For example a coprocessor often performs functions such as floating point operations, graphics transformations, and image compression. However, in typical ARM systems with coprocessors, some of the coprocessor features are continuously maintained even though the coprocessor is not being utilized to process instructions or information.
Coprocessors usually consume significant amounts of system power even though the coprocessor is not contributing to primary system operations. In particular the coprocessor is not contributing to primary system operations during 16-bit THUMB transactions since a coprocessor is not used to perform 16-bit transactions. The THUMB instruction set is smaller than the ARM instruction set and while operating in the THUMB state the coprocessor in an ARM system is not utilized. Usually the coprocessor continues to consume power even when the coprocessor is not processing instructions or information. For example the clock in the coprocessor continues to run and the coprocessor registers continue to switch state which consumes power.
Reducing power consumption by components that are not contributing to the functionality of an ARM system offers many benefits. For example, power availability is often critical in wireless communication systems that utilize ARM systems to provide processing capabilities. Wireless communication systems often rely on batteries as a power supply and reducing power consumption results in longer battery life. Reducing power consumption also permits battery sizes to be reduced which permits smaller wireless communication devices to be produce. Compact wireless communication devices usually offer greater practical application utility.
What is required is a system and method that reduces power consumption by coprocessors in an ARM system. The system and method should not interfere with the operational functionality of the ARM system. Coprocessor register switching during THUMB state operations should be reduced. The system and method should also facilitate the reduction of power supply requirements.
The system and method of the present invention reduces power consumption by coprocessors in an ARM system. The system and method does not interfere with the operational functionality of the ARM system. Coprocessor register switching during THUMB state operations is reduced by the present invention and the present invention also facilitates the reduction of power supply requirements.
In one embodiment of the present invention, an ARM coprocessor power reduction system and method detects when an ARM system is engaging in activities that do not utilize an ARM coprocessor and turns off the ARM coprocessor clock. The ARM coprocessor power reduction system and method of the present invention tracks if the ARM core is engaging in ARM state or THUMB state operations. For example, ARM coprocessor power reduction system and method analyzes a THUMB bit (TBIT) signal that indicates whether the ARM core is performing in an ARM state or THUMB state. If the ARM core is engaging in THUMB state operations the ARM coprocessor power reduction system and method of the present invention instructs a coprocessor clock to turn off. If the ARM core is engaging in ARM state operations the ARM coprocessor power reduction system and method of the present invention instructs a coprocessor clock to turn on.